BJT Voltage Divider Bias: A Stable Base Bias That Does Not Drift with Beta

Author: Abloom Instruction Date: November 11, 2026

A bipolar transistor only amplifies properly when its base is biased to the right operating point — the Q-point. The trouble is that a transistor's current gain, β, varies a lot: two transistors with the same part number can have β anywhere from 50 to 200, and β also drifts with temperature. A bias circuit that depends on β will give a different Q-point for every transistor you plug in. Voltage divider bias fixes that: it sets the base voltage with two resistors, so the collector current barely moves when β changes. This post works a complete design example.

Voltage divider bias circuit for an NPN transistor with a 12 volt supply, 47 kilo-ohm and 10 kilo-ohm divider resistors, 2.2 kilo-ohm collector resistor and 1 kilo-ohm emitter resistor, beside a bar chart showing collector current almost flat at about 1.3 milliamps for divider bias while simple base bias rises from 0.69 to 2.76 milliamps as beta goes from 50 to 200


Figure 1: Voltage divider bias circuit and Q-point (a), and collector current against β for divider bias versus simple base bias (b). The divider holds IC almost steady while base bias lets it drift four-fold. (Schematic, not to scale.)

How voltage divider bias works

R1 and R2 form a voltage divider across the supply, fixing the base voltage:

VB = VCC × R2 / (R1 + R2)

The emitter sits one base–emitter drop below the base, so VE = VB − VBE, and the emitter resistor sets the current: IE = VE / RE. Because IC ≈ IE, the collector current is set by resistors and the supply — not by β. The emitter resistor also gives negative feedback: if IC tries to rise, VE rises, VBE falls, and the base current is pulled back down. That self-correction is what makes the circuit stable.

Worked example — bias a transistor from a 12 V supply

Design for a Q-point near IC = 1.4 mA with VCC = 12 V, R1 = 47 kΩ, R2 = 10 kΩ, RC = 2.2 kΩ, RE = 1 kΩ, β = 100 and VBE = 0.7 V.

Step 1 — base voltage: VB = 12 × 10 / (47 + 10) = 120 / 57 = 2.11 V.

Step 2 — emitter voltage and current: VE = 2.11 − 0.7 = 1.41 V. IE = 1.41 / 1000 = 1.41 mA, so IC ≈ 1.41 mA.

Step 3 — collector voltage: VC = 12 − IC × RC = 12 − 0.00141 × 2200 = 12 − 3.09 = 8.91 V. Then VCE = VC − VE = 8.91 − 1.41 = 7.50 V. The transistor is well into the active region (VCE is far above the ~0.2 V saturation knee), with room to swing about ±7 V.

Step 4 — check the divider is "stiff": the divider current is Idiv = 12 / (47k + 10k) = 211 µA, while the base current is IB = IC / β = 1.41 mA / 100 = 14.1 µA. The divider carries 15 times the base current, so the base barely loads the divider and VB stays at 2.11 V. The design rule is Idiv ≥ 10 × IB — if the divider current were comparable to the base current, the base would drag VB down and the calculation would fall apart.

Step 5 — exact check: the divider's Thévenin resistance is Rth = 47k ∥ 10k = 8.25 kΩ. The exact base current is IB = (VB − VBE) / (Rth + (β + 1) × RE) = 1.41 / (8250 + 101 × 1000) = 12.9 µA, giving IC = 1.29 mA — about 8% below the simple 1.41 mA estimate, because the base does steal a little divider current. That is the price of the approximation, and it is small exactly because the divider is stiff.

Step 6 — power: P in RC = IC2 × RC = 4.34 mW; P in RE = IE2 × RE = 1.97 mW; P in the transistor = VCE × IC = 7.50 × 1.41 mA = 10.5 mW. A small-signal transistor handles this easily with no heatsink.

How stable is it really? Compare with simple base bias

Take the same transistor and bias it the simple way, with one base resistor RB = 820 kΩ chosen to give the same ~1.38 mA at β = 100. Now swap in transistors with different β:

Simple base bias: IC = 0.69 mA at β = 50, 1.38 mA at β = 100, 2.07 mA at β = 150, 2.76 mA at β = 200 — a four-fold spread, because IC = β × IB and IB is fixed.

Voltage divider bias: IC = 1.19 mA at β = 50, 1.29 mA at β = 100, 1.32 mA at β = 150, 1.34 mA at β = 200 — only a 13% spread across the same range. The emitter resistor's feedback does the work: β can wander and the Q-point barely notices.

Design rules of thumb

  • Set the emitter voltage to about 10% of the supply (here 1.41 V out of 12 V) — enough feedback for stability, without wasting supply voltage.
  • Make the divider current at least 10 times the base current, so the divider is stiff and VB is set by the resistors.
  • Check VCE leaves headroom: the collector should sit roughly mid-supply so the output can swing both ways without clipping.
  • Remember the simple estimate (IC ≈ IE) is a few percent high; the exact Thévenin check above shows by how much.

Key points to remember

  • Voltage divider bias sets VB = VCC × R2 / (R1 + R2), then IE = (VB − 0.7 V) / RE ≈ IC — the current is set by resistors, not by β.
  • Worked example: 12 V, 47 kΩ / 10 kΩ divider, 2.2 kΩ collector, 1 kΩ emitter gives VB = 2.11 V, IC ≈ 1.41 mA, VCE = 7.50 V (exact: IC = 1.29 mA).
  • The emitter resistor provides negative feedback: a rise in IC raises VE, lowers VBE, and pulls IC back down.
  • Across β = 50 to 200, divider bias holds IC between 1.19 and 1.34 mA, while simple base bias drifts from 0.69 to 2.76 mA.
  • Design rule: divider current ≥ 10 × base current (here 211 µA vs 14.1 µA — 15×), and VE ≈ 10% of VCC.